The Virtual Bookcase Reviews of 'ISA System Architecture (3rd Edition)':
Reviewer Rob Slade wrote:
The major audience for a book on this topic will be fairly select. System
designers, system hardware testers, developers of utility software, perhaps.
The topics include communications from memory and peripherals to the CPU;
memory address space; the logic of the reset circuit; 80286 and 80386 CPUs;
dynamic random access, cache, and read only memories; bus structure, cycles,
and mastering; the interrupt system; direct memory access subsystem; keyboard;
numeric coprocessor; and timers. All of this is dealt with at a hardware
level, concentrating on circuit lines that are asserted high or low rather than
simply stating that such-and-such a character gets placed in a variable. This
is hardware, and a lot of geeks don't even want to know about it.
Which is a pity, because the authors have done a really terrific job with it.
The material is clearly explained, if technically detailed, and there are parts
that would be of interest even to the computer buyer without a technical
background.
Part 1, on the system kernel, deals with the CPU and it's immediate
interactions with the bus. A hardware perspective of the CPU is intriguing:
the CPU is a device with only one function--receive and execute instructions.
(While I can sympathize with the authors' position that self-modifying code is
an abomination, their statement that CPUs do not write instructions is wrong.
ISA systems are clearly von Neumann architecture.) This part is likely of
least use to the average user, but highly instructive to any assembly
programmers who still exist. Memory is the topic of part two. The discussion
of cache memory, particularly, is one that would help any computer user to
understand sales pitches. Part three deals with the ISA bus system itself, and
particularly system interrupts. This, of course, is of interest to anyone who
has ever swapped out a card--and then wondered why the new stuff doesn't work.
copyright Robert M. Slade, 1996
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